OSC_DIV=OSC_DIV_0, SAMP_MODE=SAMP_MODE_0
Miscellaneous Control Register
| SAMP_MODE | Sample Mode 0 (SAMP_MODE_0): use Von Neumann data into both Entropy shifter and Statistical Checker 1 (SAMP_MODE_1): use raw data into both Entropy shifter and Statistical Checker 2 (SAMP_MODE_2): use Von Neumann data into Entropy shifter. Use raw data into Statistical Checker 3 (SAMP_MODE_3): undefined/reserved. |
| OSC_DIV | Oscillator Divide 0 (OSC_DIV_0): use ring oscillator with no divide 1 (OSC_DIV_1): use ring oscillator divided-by-2 2 (OSC_DIV_2): use ring oscillator divided-by-4 3 (OSC_DIV_3): use ring oscillator divided-by-8 |
| UNUSED4 | This bit is unused. Always reads zero. |
| UNUSED5 | This bit is unused. Always reads zero. |
| RST_DEF | Reset Defaults |
| FOR_SCLK | Force System Clock |
| FCT_FAIL | Read only: Frequency Count Fail |
| FCT_VAL | Read only: Frequency Count Valid. Indicates that a valid frequency count may be read from FRQCNT. |
| ENT_VAL | Read only: Entropy Valid |
| TST_OUT | Read only: Test point inside ring oscillator. |
| ERR | Read: Error status |
| TSTOP_OK | TRNG_OK_TO_STOP |
| LRUN_CONT | Long run count continues between entropy generations |
| PRGM | Programming Mode Select |